Method and apparatus for providing uninterruptible power

ABSTRACT

Methods and apparatus for providing uninterruptible power are provided by aspects of the invention. One aspect is more particularly directed to an uninterruptible power supply for providing power to a load. The uninterruptible power supply includes a first input to receive input power from an input power source, an output to provide output power, a bypass input to receive bypass power from a bypass power source, wherein the bypass input is selectively coupled to the output to provide output power from the bypass power source, an input power circuit coupled to the first input and having a DC output that provides DC power having a first DC voltage level, a back-up power source coupled to the input power circuit to provide DC power at the DC output in a back-up mode of operation, and an inverter circuit having an output coupled to the DC output of the input power circuit and having an output coupled to the output of the uninterruptible power supply to provide the output power derived from at least one of the input power source and the back-up power source. The uninterruptible power supply is constructed and arranged in a bypass mode of operation to control the inverter circuit to convert AC power from the bypass power source at the output of the inverter circuit to DC power at the input of the inverter circuit.

RELATED APPLICATIONS

This application is a Continuation of U.S. patent application Ser. No.10/930,734, filed Aug. 31, 2004 which is hereby incorporated herein byreference in its entirety.

FIELD OF THE INVENTION

The present invention relates generally to a system and method forproviding redundant power to critical loads.

BACKGROUND OF THE INVENTION

The use of an uninterruptible power system (UPS) to provide power to acritical load is well known. Known uninterruptible power systems includeon-line UPS's and off-line UPS's. On-line UPS's provide conditioned ACpower as well as back-up AC power upon interruption of a primary sourceof AC power. Off-line UPS's typically do not provide conditioning ofinput AC power, but do provide back-up AC power upon interruption of theprimary AC power source. FIG. 1 shows a block diagram of one type ofon-line UPS 10. Other on-line UPS's are described in U.S. Pat. No.5,982,652, and U.S. Pat. No. 5,686,768, both of which are incorporatedherein by reference. On-line UPS's of the type described in thereferenced patents are available from American Power ConversionCorporation, West Kingston, R.I. under the trade names Symmetra andSilicon. The UPS 10A of FIG. 1 includes an input circuit breaker/filter12, a rectifier 14, a control switch 15, a controller 16, a battery 18,an inverter 20, an isolation transformer 22, and a bypass switch 23. TheUPS also includes an input 24 for coupling to an AC power source, and anoutlet 26 for coupling to a load.

The UPS 10A operates as follows. The circuit breaker/filter 12 receivesinput AC power from the AC power source through the input, filters theinput AC power and provides filtered AC power to the rectifier 14. Therectifier rectifies the input voltage. The control switch 15 receivesthe rectified power and also receives DC power from the battery 18. Thecontroller 16 determines whether the power available from the rectifieris within predetermined tolerances, and if so, controls the controlswitch to provide the power from the rectifier to the inverter 20. Ifthe power from the rectifier is not within the predetermined tolerances,which may occur because of “brown out” or “black out” conditions, or dueto power surges, then the controller controls the control switch toprovide the DC power from the battery to the inverter 20.

The inverter 20 of the UPS 10A receives DC power and converts the DCpower to AC power and regulates the AC power to predeterminedspecifications. The inverter 20 provides the regulated AC power to theisolation transformer 22. The isolation transformer is used to increaseor decrease the voltage of the AC power from the inverter and to provideisolation between a load and the UPS. The isolation transformer istypically an optional device, the use of which is typically dependent onUPS output power specifications. Depending on the capacity of thebattery and the power requirements of the load, the UPS 10A can providepower to the load during brief power source dropouts or for extendedpower outages. The bypass switch 23 is used to provide a bypass of UPScircuitry to provide the input power directly to the output. The bypassswitch may be controlled by the controller 16 to provide bypass of theUPS circuitry upon a failure condition of the UPS.

To provide further power redundancy, it is known to use a second powersource to supply power to a bypass switch of a UPS from a second sourceof AC power. Systems of this type are often referred to as dual mainssystems. FIG. 2 shows a dual mains UPS 10B that is similar to UPS 10Aexcept that it includes a second input to couple to a second powersupply, and UPS 10B includes a bypass switch 23 that selectively couplesthe second input directly to the output of the UPS 10B. In dual mainsystems, typically, a utility power source is coupled to the first powerinput of the system and a backup power source, such as a generator iscoupled to the second power input of the system. Upon failure of theutility power source, the power system is able to continue to providepower to a load using the battery mode of operation of the UPS, whilethe generator is powered on and brought to full output voltage. Once thegenerator is on line, the power system can continue to provide outputpower in a bypass mode for an extended period of time from thegenerator.

Dual main systems may also be used with both power inputs coupled to thesame source of input power, but through separate fuses and/or circuitbreakers. For many types of power failures, the power will be lost atboth input 1 and input 2, but situations may exist, such as a blown fuseor circuit breaker, where power is lost at only input 1, and the bypassswitch can be used to continue to provide output power to a load.

One problem with dual mains systems is that in bypass mode, it is notnormally possible to charge the batteries of the UPS, which willtypically be at least partially drained when input power is beingsupplied by a source at input 2.

SUMMARY OF THE INVENTION

Embodiments of the present invention provide improved power systems. Inone aspect an uninterruptible power supply for providing power to a loadis provided. The uninterruptible power supply includes an input toreceive input power, an output to provide output power, an input powercircuit coupled to the input and having a DC output that provides DCpower having a first DC voltage level, a capacitor having a first endcoupled to the DC output of the input power circuit and having a secondend, a back-up power source coupled to the input power circuit, anoutput power circuit coupled to the DC output of the input power circuitand to the output of the uninterruptible power supply to provide theoutput power, and a capacitor discharge circuit coupled to the first endof the capacitor and the second end of the capacitor and configured in afirst mode of operation to discharge a voltage across the capacitor,such that an average discharge current through the discharge circuit isinversely proportional to a voltage across the capacitor for a firstrange of voltages across the capacitor.

The capacitor discharge circuit may be configured in a second mode ofoperation such that the discharge current through the discharge circuitis proportional to the voltage across the capacitor for a second rangeof voltages that is less than the first range of voltages. The capacitordischarge circuit may be configured in the first mode of operation tocontrol the discharge current, such that the discharge current has awaveform containing a series of pulses with a duty cycle of the pulsesbeing inversely proportional to the voltage across the capacitor over atleast the first range of voltages. The first range of voltages may beequal to a range of voltages from a lower threshold level to the firstDC voltage level, and the second range of voltages may be equal to arange of voltages from zero to the lower threshold level. The capacitordischarge circuit may include a passive discharge circuit having aninput coupled to the first end of the capacitor and an output, a switchhaving an input coupled to the output of the passive discharge circuitand an output coupled to the second end of the capacitor, and a controlcircuit coupled to the switch to control an operational state of theswitch based on the voltage across the capacitor.

Another aspect of the invention is directed to an uninterruptible powersupply for providing power to a load. The uninterruptible power supplyincludes an input to receive input power, an output to provide outputpower, an input power circuit coupled to the input and having a DCoutput that provides DC power having a first DC voltage level, acapacitor having a first end coupled to the DC output of the input powercircuit and having a second end, a back-up power source coupled to theinput power circuit, an output power circuit coupled to the DC output ofthe input power circuit and to the output of the uninterruptible powersupply to provide the output power, and means for discharging a voltageacross the capacitor, such that an average discharge current of thecapacitor is inversely proportional to a voltage across the capacitorfor a first range of voltages across the capacitor.

The uninterruptible power supply may further include means fordischarging the voltage across the capacitor such that the dischargecurrent is proportional to the voltage across the capacitor for a secondrange of voltages that is less than the first range of voltages, and mayfurther include means for discharging the voltage across the capacitorsuch that the discharge current has a waveform containing a series ofpulses with a duty cycle of the pulses being inversely proportional tothe voltage across the capacitor over at least the first range ofvoltages. The first range of voltages may be equal to a range ofvoltages from a lower threshold level to the first DC voltage level, andthe second range of voltages may be equal to a range of voltages fromzero to the lower threshold level.

Another aspect of the invention is directed to a method of discharging avoltage across a capacitor in a uninterruptible power supply. The methodincludes charging the capacitor to a first voltage value, detecting thevoltage across the capacitor, and discharging the capacitor using adischarge current having an average value that is inversely proportionalto the voltage across the capacitor, such that over at least a firstrange of voltages across the capacitor, the average value of thedischarge current increases as the voltage across the capacitordecreases.

The method may further include during discharge of the capacitor,detecting that the voltage across the capacitor has decreased to asecond voltage value, less than the first voltage value, and dischargingthe capacitor using a discharge current having an average value that isproportional to the voltage across the capacitor, such that for a secondrange of voltages the average value of the discharge current decreasesas the voltage across the capacitor decreases. The method may furtherinclude controlling the discharge current, while the voltage across thecapacitor is within the first voltage range, such that the dischargecurrent has a waveform containing a series of pulses with a duty cycleof the pulses being inversely proportional to the voltage across thecapacitor over the first range of voltages. The method may still furtherinclude controlling the discharge current to be continuous over thesecond range of voltages. The first range of voltages may be equal to arange of voltages from the first voltage value to the second voltagevalue, and the second range of voltages may be equal to a range ofvoltages from the second voltage value to a voltage level of zero.

Another aspect of the invention is directed to an uninterruptible powersupply for providing power to a load. The uninterruptible power supplyincludes a first input to receive input power from an input powersource, an output to provide output power, a bypass input to receivebypass power from a bypass power source, wherein the bypass input isselectively coupled to the output to provide output power from thebypass power source, an input power circuit coupled to the first inputand having a DC output that provides DC power having a first DC voltagelevel, a back-up power source coupled to the input power circuit toprovide DC power at the DC output in a back-up mode of operation, and aninverter circuit coupled to the DC output of the input power circuit andto the output to provide the output power derived from at least one ofthe input power source and the back-up power source. The uninterruptiblepower supply is constructed and arranged in a bypass mode of operationto control the inverter circuit to convert AC power from the bypasspower source at the output of the inverter circuit to DC power at theinput of the inverter circuit.

The uninterruptible power supply may include a battery charger coupledto the input of the inverter to receive DC power and provide power tocharge the back-up power source in the bypass mode of operation, and mayfurther include a power supply coupled to the input of the invertercircuit to receive DC power and to provide DC power to components of theuninterruptible power supply in the bypass mode of operation. Theback-up power source may include at least one battery. The first inputand the bypass input may be configured to be coupled to a common sourceof power. The uninterruptible power supply may include a bypass switchcoupled between the bypass input and the output of the inverter circuitand controlled to operate in a closed position in the bypass mode ofoperation.

Another aspect of the invention is directed to an uninterruptible powersupply for providing power to a load. The uninterruptible power supplyincludes a first input to receive input power, an output to provideoutput power, a bypass input to receive bypass power, wherein the bypassinput is selectively coupled to the output to provide output power fromthe bypass power, an input power circuit coupled to the first input andhaving a DC output that provides DC power having a first DC voltagelevel, a back-up power source coupled to the input power circuit toprovide DC power at the DC output in a back-up mode of operation, aninverter circuit coupled to the DC output of the input power circuit andto the output to provide the output power derived from at least one ofthe input power and power from the back-up power source, and means forcontrolling the inverter circuit in a bypass mode of operation toconvert AC power from the bypass power source at the output of theinverter circuit to DC power at the input of the inverter circuit.

The uninterruptible power supply may include means for charging theback-up power source in the bypass mode of operation, and may furtherinclude a power supply coupled to the input of the inverter circuit toreceive DC power and to provide DC power to components of theuninterruptible power supply in the bypass mode of operation. Theback-up power source may include at least one battery. Theuninterruptible power supply may include a bypass switch coupled betweenthe bypass input and the output of the inverter circuit and controlledto operate in a closed position in the bypass mode of operation. Themeans for controlling the inverter circuit may include means forcontrolling power factor at the input of the inverter circuit in bypassmode of operation.

Another aspect of the invention is directed to a method for providinguninterrupted power from a power supply having a first input, a bypassinput and an output from which power is provided, the power supplyfurther including a source of back-up power and an inverter thatconverts DC power to AC power for use at the output of the power supply.The method includes operating the power supply in a first mode ofoperation with power at the output being supplied from the inverter andderived from power at the first input, operating in a bypass mode withpower at the output being supplied from power at the bypass input, andin the bypass mode, operating the inverter to provide DC power at aninput of the inverter from AC power at an output of the inverter.

The back-up power source may be coupled to the input of the inverter,and the method may include charging the back-up power source in thebypass mode. The back-up power source may include a battery, andcharging the back-up power source may include using DC power at theinput of the inverter to charge the battery. The method may includeoperating in a back-up mode of operation with power at the output beingderived from power from the back-up power source. The power supply mayfurther include a power supply unit coupled to the input of theinverter, and the method may include powering the power supply unit fromthe DC power at the input of the inverter in bypass mode. The method mayinclude controlling current through the inverter in the bypass mode tobe substantially in phase with voltage at the output of the inverter.The method may include sensing a voltage at the input of the inverter inbypass mode and controlling the inverter to maintain the voltage at theinput of the inverter at a predetermined value.

Another aspect of the invention is directed to an uninterruptible powersupply for providing power to a load. The uninterruptible power supplyincludes an input to receive input power, an output to provide outputpower, a back-up power source coupled to the output to provide backuppower at the output, a contactor coupled to the input and having an openstate and a closed state, a contactor control circuit having an outputcoupled to the contactor to provide an output voltage to control anoperational state of the contactor, the contactor control circuit beingconfigured to provide an output voltage having a first voltage level tothe contactor to control the contactor to switch from the open state tothe closed state and to provide a second output voltage having a secondvoltage level to maintain the contactor in the closed state.

The contactor control circuit may be configured to provide a zerovoltage level to the contactor to place the contactor in the open state.The contactor control circuit may include a power converter thatreceives an input voltage and provides the output voltage to thecontactor, a switch coupled between the power converter and thecontactor, and a switch control circuit coupled to the switch andadapted to receive an input signal and control the switch to selectivelycouple the output of the contactor control circuit to the contactor. Theswitch control circuit may include an output coupled to the powerconverter to control the output voltage of the power converter. Thepower converter may include a capacitor configured such that the outputvoltage of the contactor control circuit is across the capacitor. Theswitch may include a first switch coupled in series with a secondswitch, such that the output voltage of the contactor control circuit isapplied to the contactor when both the first switch and the secondswitch are in a closed state. The uninterruptible power supply mayfurther include an input circuit coupled through the contactor to theinput of the uninterruptible power supply to receive input power andcoupled to the back-up power source to receive back-up power andconfigured to provide DC power derived from at least one of the inputpower and the back-up power, and an output circuit coupled to the inputcircuit to receive the DC power, and configured to provide AC power,derived from the DC power, at the output of the uninterruptible powersupply. The uninterruptible power supply may further include a powersupply unit having an input coupled to the input of the uninterruptiblepower supply to receive input power and an output coupled to the powerconverter to provide the input voltage to the power converter.

Another aspect of the invention is directed to a method for controllinga contactor contained in an uninterruptible power supply having anoutput that provides output power from one of a primary power source anda back-up power source. The method includes detecting presence of ACpower from the primary power source, applying a voltage having a firstvalue to the contactor to change a state of the contactor to closed fromopen, and applying a voltage having a second value to the contactorafter the contactor has changed from open to closed to maintain thecontactor in the closed state.

The method may further include detecting a loss of AC power from theprimary power source, and removing the voltage from the contactor toopen the contactor. The stage of applying a voltage having the firstvalue may include coupling a capacitor charged to the first value acrossthe contactor. The stage of applying a voltage having the second valuemay include allowing the capacitor to discharge until the voltage acrossthe capacitor is equal to the second value. The stage of applying avoltage having a first value may include controlling a pair of switchescoupled in series such that each of the switches is turned to a closedstate to apply the voltage to the contactor. The method may furtherinclude coupling a power supply unit to the primary power source, andcharging the capacitor using voltage derived from an output of the powersupply unit. The stage of charging the capacitor may include coupling aboost circuit between the output of the power supply unit and thecapacitor and controlling the boost circuit to generate a voltage havingthe first voltage value across the capacitor and to generate a voltagehaving the second voltage value across the capacitor.

Another aspect of the invention is directed to an uninterruptible powersupply for providing power to a load. The uninterruptible power supplyincludes an input to receive input power, an output to provide outputpower, a back-up power source coupled to the output to provide backuppower at the output, a contactor coupled to the input and having an openstate and a closed state, and means for providing an output voltagehaving a first voltage level to the contactor to control the contactorto switch from the open state to the closed state and for providing asecond output voltage having a second voltage level to maintain thecontactor in the closed state.

The uninterruptible power supply may include means for providing a zerovoltage level to the contactor to place the contactor in the open state,and may further include a power supply unit having an input coupled tothe input of the uninterruptible power supply to receive input power andan output that provides a power supply output voltage, and means forconverting the power supply output voltage to the first voltage leveland the second voltage level. The means for providing an output voltagemay include a capacitor and means for selectively coupling the capacitoracross the contactor. The means for providing an output voltage includesmeans for charging the capacitor to a voltage having the first voltagelevel and for discharging the capacitor until the voltage across thecapacitor is equal to the second voltage level. The means forselectively coupling the capacitor may include a pair of switchescoupled in series such that each of the switches is turned to a closedstate to apply voltage to the contactor.

Yet another aspect of the invention is directed to an uninterruptiblepower supply for providing power to a load. The uninterruptible powersupply includes an input to receive input power, an output to provideoutput power, a plurality of battery modules that provide backup power,a power circuit coupled to the input, coupled to the plurality ofbattery modules and coupled to the output to provide power derived fromat least one of the input power and the backup power to the output, acontroller, a return line coupled to the controller and coupled to eachof the battery modules, and a first sense line coupled to the controllerand coupled to the plurality of battery modules. The controller and eachof the battery modules are configured and arranged such that at leastone characteristic of the battery modules is determined by thecontroller based on signals detected by the controller on the firstsense line.

The at least one characteristic of the battery modules detected mayinclude a total capacity of the plurality of battery modules. Each ofthe battery modules may include a resistor coupled between the firstsense line and the return line, and the controller may detect a voltageacross the first sense line and the return line and determine totalcapacity based on the voltage detected. The total capacity may bedetermined in terms of ampere-hours. The uninterruptible power supplymay further include a power supply line having a first end coupled tothe plurality of battery modules, and a power supply coupled to a secondend of the power supply line and coupled to the return line thatgenerates an output voltage across the power supply line and the returnline, and the voltage across the resistor in each of the plurality ofbattery modules may be derived from the output voltage of the powersupply. Each of the resistors in each of the plurality of batterymodules may have approximately a same resistance value. At least one ofthe plurality of battery modules may include a plurality of batteryunits. The first sense line, the return line and the power supply linemay be directly coupled to a first one of the plurality of batterymodules and coupled to each remaining battery module using a daisychain. The uninterruptible power supply may further include a batteryframe that contains at least one of the plurality of battery modules,and the first sense may be further coupled to the battery frame, and thecontroller and the battery frame may be configured and arranged suchthat the controller can detect a blown fuse in the battery frame.

The uninterruptible power supply may still further include a secondsense line coupled to the controller and coupled to each of theplurality of battery modules, and the controller and the battery modulesmay be configured and arranged such that the controller determines ahighest temperature present in the plurality of battery modules based ona voltage across the second sense line and the return line. Each of theplurality of battery modules may include a variable resistor having aresistance value that varies with temperature coupled to the secondsense line. Each of the plurality of battery modules may include a diodecoupled between the variable resistor and the second sense line. Theuninterruptible power supply may further include a power supply linehaving a first end coupled to the plurality of battery modules, and apower supply coupled to a second end of the power supply line andcoupled to the return line that generates an output voltage across thepower supply line and the return line, and the voltage across theresistor in each of the plurality of battery modules may be derived fromthe output voltage of the power supply. The uninterruptible power supplymay further include a second sense line coupled to the controller andcoupled to each of the plurality of battery modules, and the controllerand the battery modules may be configured and arranged such that thecontroller determines a highest temperature present in the plurality ofbattery modules based on a voltage across the second sense line and thereturn line.

Another aspect of the invention is directed to an uninterruptible powersupply for providing power to a load. The uninterruptible power supplyincludes an input to receive input power, an output to provide outputpower, a plurality of battery modules that provide backup power, a powercircuit coupled to the input, coupled to the plurality of batterymodules and coupled to the output to provide power derived from at leastone of the input power and the backup power to the output, a return linecoupled to each of the battery modules, a first sense line coupled tothe plurality of battery modules, and means for determining at least onecharacteristic of the battery modules based on signals detected on thefirst sense line.

The means for determining may include means for determining a totalcapacity of the plurality of battery modules. The total capacity may bedetermined in terms of ampere-hours. The uninterruptible power supplymay further include a power supply line having a first end coupled tothe plurality of battery modules, and a power supply coupled to a secondend of the power supply line and coupled to the return line thatgenerates an output voltage across the power supply line and the returnline. The at least one of the plurality of battery modules may include aplurality of battery units. The first sense line, the return line andthe power supply line may be directly coupled to a first one of theplurality of battery modules and coupled to each remaining batterymodule using a daisy chain. The uninterruptible power supply may furtherinclude a battery frame that contains at least one of the plurality ofbattery modules, wherein the first sense line is further coupled to thebattery frame, and means for detecting a blown fuse in the batteryframe. The uninterruptible power supply may further include a secondsense line coupled to each of the plurality of battery modules, andmeans for determining a highest temperature present in the plurality ofbattery modules based on a voltage across the second sense line and thereturn line. Each of the plurality of battery modules may include avariable resistor having a resistance value that varies with temperaturecoupled to the second sense line. Each of the plurality of batterymodules may include a diode coupled between the variable resistor andthe second sense line.

Still another aspect of the invention is directed to a method ofmonitoring devices in an uninterruptible power supply having an inputthat receives input power, a plurality of battery modules that providebackup power, and an output that provides output power derived from atleast one of the input power and the backup power. The method includescoupling a first sense line to each of the plurality of battery modules,coupling a return line to each of the battery modules, determining atleast one characteristic of the battery modules based on a voltage leveldetected on the first sense line.

The stage of determining at least one characteristic may includedetermining a total capacity of the plurality of battery modules. Thetotal capacity may be determined in terms of ampere-hours. Theuninterruptible power supply may further include a power supply unit,and the method may further include coupling a first end of a powersupply line to the plurality of battery modules, and coupling a secondend of the power supply line to the power supply to generate an outputvoltage across the power supply line and the return line. The stage ofcoupling the first sense line, the return line and the power supply lineto the plurality of battery modules may include directly coupling thefirst sense line, the return line and the power supply line to a firstone of the plurality of battery modules and coupling each remainingbattery module using a daisy chain. The uninterruptible power supply mayinclude a battery frame, and the method may further include detecting ablown fuse in the battery frame. The method may still further includecoupling a second sense line to each of the plurality of batterymodules, and determining a highest temperature present in the pluralityof battery modules based on a voltage across the second sense line andthe return line.

Another aspect of the invention is directed to an uninterruptible powersupply for providing power to a load. The uninterruptible power supplyincludes an input to receive input power, an output to provide outputpower, a backup power device that provides backup power, a power circuitcoupled to the input, coupled to the backup power device and coupled tothe output to provide power derived from at least one of the input powerand the backup power to the output, the power circuit having a firstpower interface module having a plurality of first power modules. Theuninterruptible power supply further includes a controller, a firstsense line coupled to the controller and coupled to the first powerinterface module and the plurality of first power modules, and a returnline coupled to the controller and coupled to the first power interfacemodule and the plurality of first power modules. The controller, thefirst power interface module and the plurality of first power modulesare configured and arranged such that the controller identifies arevision level of the first power interface module and a revision levelof the plurality of first power modules, based on a voltage leveldetected by the controller across the first sense line and the returnline.

The power circuit may include a second power interface module having aplurality of second power modules, wherein the first sense line iscoupled to the second power interface module and the plurality of secondpower modules of the second power interface module, and wherein thecontroller, the second power interface module and the plurality ofsecond power modules are configured and arranged such that thecontroller identifies a revision level of the second power interfacemodule and a revision level of the plurality of second power modules,based on the voltage level detected by the controller across the firstsense line and the return line. The controller and the plurality offirst power modules may be further configured and arranged to allow thecontroller to identify a high temperature condition in one of the firstpower modules based on the voltage across the first sense line and thereturn line. The controller, the plurality of first power modules andthe plurality of second power modules may be arranged to allow thecontroller to identify a high temperature condition in one of the firstpower modules or the second power modules based on the voltage acrossthe first sense line and the return line. The controller may beconfigured to adjust control parameters of the uninterruptible powersupply based on the revision detected of the first power interface boardand the revision detected of the plurality of first power modules. Eachof the first power interface module and the plurality of first powermodules may include a resistor coupled to the first sense line and thereturn line, wherein a resistance value of the resistor identifies arevision level. Each of the plurality of first power modules includes athermal switch coupled between the first sense line and the return line.

Still another aspect of the invention is directed to an uninterruptiblepower supply for providing power to a load. The uninterruptible powersupply includes an input to receive input power, an output to provideoutput power, a backup power device that provides backup power, a powercircuit coupled to the input, coupled to the backup power device andcoupled to the output to provide power derived from at least one of theinput power and the backup power to the output, the power circuit havinga first power interface module having a plurality of first powermodules. The uninterruptible power supply further includes a first senseline coupled to the first power interface module and the plurality offirst power modules, and a return line coupled to the first powerinterface module and the plurality of first power modules, and means foridentifying a revision level of the first power interface module and arevision level of the plurality of first power modules, based on avoltage level detected across the first sense line and the return line.

The power circuit may include a second power interface module having aplurality of second power modules, and the first sense line may becoupled to the second power interface module and the plurality of secondpower modules of the second power interface module, and theuninterruptible power supply may further include means for identifying arevision level of the second power interface module and a revision levelof the plurality of second power modules, based on the voltage leveldetected across the first sense line and the return line. Theuninterruptible power supply may further include means for identifying ahigh temperature condition in one of the first power modules based onthe voltage across the first sense line and the return line, and mayinclude means for identifying a high temperature condition in one of thefirst power modules or the second power modules based on the voltageacross the first sense line and the return line. The uninterruptiblepower supply may also include means for controlling parameters of theuninterruptible power supply based on the revision detected of the firstpower interface board and the revision detected of the plurality offirst power modules.

Still another aspect of the invention is directed to a method forcontrolling an uninterruptible power supply having a first powerinterface module and a plurality of power modules coupled to the firstpower interface module. The method includes coupling a first sense lineto the first power interface module and the plurality of first powermodules, coupling a return line to the first power interface module andthe plurality of first power modules, identifying a revision level ofthe first power interface module and a revision level of the pluralityof first power modules, based on a voltage level detected across thefirst sense line and the return line, and controlling parameters of theuninterruptible power supply based on the revision level of the firstpower interface board and the revision level of the plurality of firstpower modules.

The uninterruptible power supply may include a second power interfacemodule having a plurality of second power modules, and the method mayfurther include coupling the first sense line to the second powerinterface module and the plurality of second power modules of the secondpower interface module, and identifying a revision level of the secondpower interface module and a revision level of the plurality of secondpower modules, based on the voltage level detected across the firstsense line and the return line. The method may further includeidentifying a high temperature condition in one of the first powermodules based on the voltage across the first sense line and the returnline. The method may still further include identifying a hightemperature condition in one of the first power modules or the secondpower modules based on the voltage across the first sense line and thereturn line.

BRIEF DESCRIPTION OF THE DRAWINGS

The accompanying drawings are not intended to be drawn to scale. In thedrawings, each identical or nearly identical component that isillustrated in various figures is represented by a like numeral. Forpurposes of clarity, not every component may be labeled in everydrawing. In the drawings:

FIG. 1 is a functional block diagram of a first prior art UPS system;

FIG. 2 is a functional block diagram of a second prior art UPS system;

FIG. 3 is a functional block diagram of a UPS system in accordance withone embodiment of the invention;

FIG. 4 is a functional block diagram of an inverter chargingconfiguration that may be used in the UPS system of FIG. 3;

FIG. 5 is a diagram of a capacitor and capacitor discharge circuit thatmay be used in the UPS system of FIG. 3;

FIG. 6 is a functional block diagram of the capacitor discharge circuitof FIG. 5;

FIGS. 7A and 7B show waveforms of signals used in the capacitordischarge circuit of FIG. 6;

FIG. 8 is a schematic diagram of the capacitor discharge circuit of FIG.6;

FIG. 9 is a functional block diagram of a contactor control circuit thatmay be used in the power supply of FIG. 3;

FIGS. 10A and 10B are schematic diagrams of the contactor controlcircuit of FIG. 9;

FIG. 11A is a schematic diagram of a battery monitoring circuit inaccordance with one embodiment of the present invention;

FIG. 11B is a graph depicting the relationship between a bit value and acorresponding temperature for the battery monitoring circuit of FIG.11A;

FIG. 11C is a schematic diagram of a buffer circuit that may be usedwith the battery monitoring circuit of FIG. 11A;

FIG. 12 is a schematic diagram of a second battery monitoring circuit inaccordance with one embodiment of the present invention; and

FIG. 13 is a schematic diagram of a board revision detection circuit inaccordance with one embodiment of the present invention.

DETAILED DESCRIPTION

This invention is not limited in its application to the details ofconstruction and the arrangement of components set forth in thefollowing description or illustrated in the drawings. The invention iscapable of other embodiments and of being practiced or of being carriedout in various ways. Also, the phraseology and terminology used hereinis for the purpose of description and should not be regarded aslimiting. The use of “including,” “comprising,” or “having,”“containing,” “involving,”, and variations thereof herein, is meant toencompass the items listed thereafter and equivalents thereof as well asadditional items.

Embodiments of the present invention provide cost-effective, highavailability power solutions. One embodiment of an uninterruptible powersystem 100 in accordance with the present invention will now bedescribed with reference to FIG. 3, which shows a functional blockdiagram of the UPS 100. The UPS 100 includes a rectifier/power factorcorrection (PFC) circuit 114, a controller 116, a battery 118, aninverter 120, a bypass switch 123, a battery charger 125, a power supplyunit (PSU) 127, an inverter relay 132, a DC bus 133, and contactors 134and 136. The UPS 100 also includes a primary power input 101, a bypasspower input 102 and a power output 103. As with UPS 10B described above,the primary input 101 and the bypass input 102 may be coupled toseparate sources of power or may be coupled to a common source of powerthrough separate distribution components (i.e., relays, circuitbreakers, fuses).

In the embodiment shown in FIG. 3, the battery 118 is shown coupled tothe rectifier/PFC circuit using a solid line 140, and is shown coupledto the DC bus 133 through a DC-DC converter 142 using dashed lines 144and 146. The two connections of the battery indicate alternativeconnections of the battery in different embodiments of the invention,and in still another embodiment, the battery may be coupled to the DCbus 133 without the use of a DC-DC converter. In one embodiment, inwhich the battery is coupled to the rectifier/PFC circuit 114, and inwhich both a positive and negative battery is used (as well as positiveand negative DC buses), the battery voltage may be boosted using therectifier/PFC circuit as described in co-pending U.S. patent applicationSer. No. 10/470,124, filed Jul. 25, 2003, titled Combined AC-DC to DCConverter, assigned to the assignee of the present application andincorporated herein by reference. In this first embodiment, the batteryhas a fully charged voltage of 192 volts (or −192 volts for the negativebattery) and the voltage of the DC bus is 225 volts (and −225 for thenegative bus). In another embodiment in which the battery is coupled tothe DC bus 133 using the DC-DC converter 142, the battery may have adifferent voltage and the DC-DC converter can convert the DC batteryvoltage to match the voltage of the DC bus. In the embodiment shown inFIG. 3 only one battery is shown, however, in different embodiments, thebattery 118 may be implemented using a combination of batteries coupledin parallel and/or in series to provide the voltage and capacitynecessary for a given implementation.

The controller 116 is used to provide monitoring and control ofcomponents of the UPS 100. In FIG. 3, the controller 116 is shown ascoupled only to the rectifier/PFC circuit 114 and the inverter 120,however, in different embodiments, the controller 116 may be coupled toall major components of the UPS 100 and may also be coupled to numeroussensing devices to monitor operational parameters of the UPS 100. ThePSU 127 is coupled to the DC bus 133 and in one embodiment receives DCpower from the bus and provides regulated output voltages to operatefans contactor coils and control boards. As shown in FIG. 3, the PSU 127may also couple to the primary power input through input 129, bypassingcontactor 136. In one embodiment, in which the PSU 127 couples to theprimary input, the connection for the PSU is made after input EMIfiltering and surge protection, and rectification diodes and currentlimiting resistors (not shown) are used to couple the PSU to the primarypower input.

The contactors 134 and 136 provide isolation and backfeed protectionbetween the UPS 100 and respectively the primary input 101 and thebypass input 102.

In a normal mode of operation of the UPS 100, AC power at the powerinput is passed through contactor 136 and rectified and power factorcorrected in the rectifier/PFC circuit 114 to provide DC power to the DCbus. The inverter 120 receives the DC power and provides regulated ACpower at the power output 103 through contactor 138. In the normal modeof operation, battery 118 is charged from the DC bus using a batterycharger 125.

In battery mode of operation, contactor 136 (as well as contactor 134)is in an open position, and DC voltage is supplied from the battery tothe DC bus 133 through either rectifier/PFC circuit 114 or through DC-DCconverter 142. The inverter converts the DC voltage on the bus to ACvoltage and provides output AC voltage to a load coupled to output 103.In the normal mode of operation and in the battery mode of operation,the inverter switch 132 is in the closed position. The switch 132 may beopened during a test mode of the UPS 100 to isolate the output from aload during a self-test.

The UPS 100 may also utilize a bypass mode of operation when inputvoltage is available at the bypass input 102 and not available at theprimary input 101. In the bypass mode of operation, AC voltage at bypassinput 102 is provided through contactor 134 and bypass switch 123 to theoutput 103. The bypass mode of operation may be used in place of thebattery mode of operation to save battery life or may be used afterbattery mode when the batteries have become partially drained. In oneembodiment, the UPS 100 may also include a mechanical bypass switchcoupled directly between the bypass input 102 and the AC output 103. Themechanical bypass allows a user to completely bypass the UPS 100 uponfailure of the UPS or to provide maintenance to the UPS.

The UPS 100 may be implemented as a single phase power supply, a threephase power supply or as a split phase supply and different embodimentsmay be designed to accommodate various input voltages as known to thoseskilled in the art. Further, the UPS 100 may be implemented as amodular, scalable UPS having multiple replaceable power modules andbattery modules as described in U.S. Pat. No. 5,982,652 and inco-pending U.S. patent application Ser. No. 10/764,344, filed Jan. 23,2004, titled Method and Apparatus for Providing Uninterruptible Power,both of which are assigned to the assignee of the present applicationand incorporated by reference herein. The UPS 100 is shown as a singleDC bus UPS, however, other embodiments of the present invention mayutilize dual DC buses having a positive and a negative bus and a commoncentral point as described in U.S. patent application Ser. No.10/470,124 discussed above.

As discussed above, one problem with typical dual mains uninterruptiblepower supplies is the inability in such supplies to charge batteries ofthe UPS while operating in bypass mode. In one aspect of the UPS 100described above, as will now be described with reference to FIG. 4,batteries of the UPS may be charged while operating in bypass mode. Asdiscussed above, upon loss of power at input 101 in the UPS 100, the UPS100 may either enter a bypass mode in which bypass switch 123 isactivated to provide output power for the load from a secondary sourceat input 102 or the UPS may operate in battery mode with DC power fromthe battery converted to AC through the inverter 120. In the aspect ofthe invention which will now be described, the inverter 120 is operatedin a reverse/rectifier mode to maintain a constant voltage on the DC bus133 when the UPS 100 is operating in bypass mode. The battery 118 canthen be charged from the voltage on the DC bus using battery charger125. As known to those skilled in the art, and as described in U.S. Pat.No. 5,302,858, which is incorporated herein by reference, by changingthe control of an inverter, the components of the inverter may be usedin a reverse mode as a rectifier.

FIG. 4 provides a functional block diagram of portions of the UPS 100along with portions of the control system utilized to implement theaspect of the invention in which batteries of the UPS 100 may be chargedwhile the UPS 100 is operating in bypass mode. In the portion of the UPS100 shown in FIG. 4, a control block 216 is coupled to the output of theinverter 120 to sense current at the output of the inverter using line218 and to sense the voltage at the output of the inverter using senseline 220. The voltage of the DC bus 133 is also monitored by the controlblock using sense line 219. Control of the inverter is provided usingcontrol line 222. As understood by those skilled in the art, indifferent embodiments of the invention, control line 222 may beimplemented using a number of distinct control lines to controltransistors contained within the inverter 120, and the control linesused to control the inverter in bypass mode to charge the batteries maybe the same as those used in other modes of the UPS 100 to provide anoutput AC voltage from the inverter.

The control block 216 includes a multiplier 224, a DC voltage regulator226, combiners 228 and 230, an AC current regulator 232 and a pulsewidth modulator (PWM) 234. To provide DC voltage to the DC bus 133 inthe bypass mode of operation, the inverter relay 132 is moved to theclosed position, and AC current from the power source at the secondinput is rectified by the inverter under the control of control block216. The control block 216 monitors the input current and voltage to theinverter/rectifier and the voltage of the DC bus and controls theinverter 120 to function as a rectifier to maintain the voltage on theDC bus at a desired value to provide a DC voltage to the battery chargerand provide a DC voltage for the PSU. In the embodiment shown in FIG. 4,the battery is coupled to the rectifier/PFC circuit and is charged usinga battery charger circuit 125, however, as described above, in otherembodiments, the battery may be coupled directly to the DC bus or to theDC bus through a DC-DC converter. When coupled directly to the DC bus,an external battery charging circuit may not be needed.

The UPS 100 utilizes current control to control operation of theinverter 120 in the rectifier mode. An inner current control loop thatincludes a comparator 230, the current regulator 232 and the PWMmodulator 234 provides control signals to the inverter to controlcurrent through the inverter. In one embodiment, peak current control isused with a fixed PWM frequency of 20 kHz. However, in otherembodiments, average current control may be used and also the PWMfrequency may be free-running The inner current control loop uses thecomparator 230 to compare the actual measured current by a currentsensor with the output of the multiplier 224, so that the current iscontrolled to follow the output of the multiplier. The multiplier 224has a first input coupled to the output of the inverter and a secondinput coupled to the output of a second comparator 228, which provides asignal indicative of a difference between the DC bus voltage and a DCbus reference voltage. The output signal of the multiplier is in phasewith the voltage at the bypass input and has an amplitude based on thevoltage level of the DC bus. The AC current regulator 232 and the DCvoltage regulator 226 act as gain stages that buffer the control signalsto provide appropriate signal levels for the inputs of the PWM modulator234 and the multiplier 224.

Using the approach described above, the amplitude of the current drawnthrough the rectifier is based on the voltage level of the DC bus, andthe phase of the current drawn by the inverter is in phase with theinput voltage, so that unity power factor is obtained, and the voltageof the DC bus can be maintained at a constant level even in the presenceof voltage swings at the bypass input.

In an alternate embodiment, a reference sine generator may be used inplace of the DC bus reference, with the sine generator phase-locked tothe voltage at the bypass input using a phase locked loop. In thisembodiment, the multiplier 224 would not be present.

In one embodiment, in which digital control of the inverter is used (inboth inverter and rectifier modes), the voltage of the DC bus 133 can bemaintained, and accordingly battery 118 may be charged, in bypass modewithout any additional components being added to the system. In thisembodiment, the functions provided by control block 216 may beimplemented using control algorithms in firmware of the controller 116.As known to those skilled in the art, these algorithms are similar tothose used to operate the inverter 120 in inverter mode. In otherembodiments, analog inverter control may be used, and in theseembodiments, functions of control block 216 may require additionalcontrol circuits. In one embodiment, the inverter is implemented using afour-quadrant inverter.

The aspect of the present invention discussed above directed to the useof an inverter as a rectifier in bypass mode is also applicable toembodiments of the invention that use both a positive DC bus and anegative DC bus with a common center point. In such an implementation,individual control loops may be used for the positive and negativevoltages, with the control loop for the positive bus being active duringpositive values of the reference current signal, and the control loopfor the negative bus being active during negative values of thereference current signal. In one embodiment, in which both a positive DCbus and a negative DC bus are used, the inverter may be implementedusing a three level inverter, such as those described in co-pending U.S.application Ser. No. 10/680,278, titled Three Level Inverter, filed Oct.7, 2003, incorporated herein by reference.

In UPSs, such as UPS 100 that have an internal power supply unit (PSU127) powered from the internal DC bus, embodiments of the inventionprovide additional benefits. It is desirable to power an internal PSUfrom a regulated DC bus rather than from a loosely regulated AC input,as it allows the PSU to be implemented as a DC-DC converter as opposedto an AC-DC power supply that requires input filtering, EMI control andinput rectifiers. In the embodiment of the invention described above,since the DC bus is maintained at its proper voltage level in bypassmode using the inverter as a rectifier, the PSU 127 can be powered on inbypass mode without draining battery 118. With the PSU powered on inbypass mode, various devices within the UPS 100, such as fans, controlboards, contactor coils and a display can be operated, in addition tothe battery charger, while in bypass mode.

In one embodiment of the UPS 100, as shown in FIG. 5, one or more largeDC capacitors 137 are coupled between the DC bus 133 and the commonpoint for the DC bus 135 to assist in maintaining the DC voltage of thebus constant. In one embodiment used with a 15 kVA UPS having a dual+/−225 volt DC bus, a number of capacitors totaling 12,000 uF are usedfor the DC capacitor 137. In the embodiment shown in FIG. 5, a dischargecircuit 300 is coupled across the capacitor 137 to discharge thecapacitor after power is removed from the UPS in accordance with safetyrequirements. Typical safety requirements from, for example,Underwriter's Laboratory (UL) and the International ElectrotechnicalCommission (IEC), require that the voltage across the capacitor 137 bereduced to a safe level (i.e., 40 VDC) in a specified period of time(i.e., five minutes).

In typical UPSs, to meet these safety requirements, either a passive oran active discharge circuit is used. Typical passive circuits useresistors as discharging devices in parallel with the capacitor to bedischarged. The use of resistors is often undesirable as these resistorsdraw maximum power at normal operating conditions (full voltage acrossthe capacitor), and the discharge effect of the resistors drops as thevoltage across the capacitor drops. Also, the use of resistors createsunwanted power losses. Active discharge circuits have an advantage overpassive circuits as they are typically designed to draw constant powerin discharge mode rather than follow the square of the voltage acrossthe capacitors as with resistive discharge circuits. Active dischargecircuits typically use a semiconductor device, such as a MOSFETtransistor, however, these transistors when used in dischargeapplications typically require large heat sinks to be used. Activedischarge circuits that use transistors that activate resistordischarging when power is turned off have also been used, but thesedevices still suffer from some of the disadvantages of using resistors,and often require complex activation circuits.

In one embodiment of the present invention the discharge control circuit300 is implemented using a continuously active circuit that draws lesspower than typical passive resistor discharge circuits, and the powerdraw of the discharge device remains substantially constant over a largevoltage range. The use of a continuously active circuit in embodimentsof the invention allows the discharge circuit to operate without theneed for external control circuits that activate the discharge circuitwhen power to the UPS is removed.

A functional block diagram of the discharge control circuit 300 inaccordance with one embodiment is shown in FIG. 6. The discharge controlcircuit includes a control circuit 302, a passive discharge circuit 304and a controlled switch 306. The control circuit 302 is coupled betweenthe DC bus 133 and the common line 135, and the passive dischargecircuit 304 and the switch 306 are coupled in series between the DC busand the common line. The control circuit has a control input line 308coupled between the passive discharge circuit and the switch and has acontrol output line coupled to the switch to control the state of theswitch. The control circuit 302 detects the DC bus voltage and controlsthe switch 306 using control line 310 to control current flow throughthe passive discharge circuit. The control input 308 is used in oneembodiment to detect when the switch 306 has been turned off to reset atiming circuit in the control circuit 320.

In general, the control circuit 302 lowers the duty cycle for the “on”time of the switch for higher DC bus voltages and increases the dutycycle for lower DC bus voltages. In one embodiment, in which the DC busvoltage is designed to operate at 225 VDC with a DC capacitance value of12,000 uF, the control circuit 302 controls the switch to operate at aswitching frequency of approximately 200 Hz. In this embodiment, in apower off condition, once the voltage of the DC bus drops toapproximately 120 VDC, the control circuit controls the switch to stayon. FIGS. 7A and 7B show respectively the voltage across the DC bus,line 301 in FIG. 7A, and the current through the discharge circuit, line303 in FIG. 7B, for the example described above after power to the UPS100 has been turned off. For the example shown in FIGS. 7A and 7B, thefrequency has been reduced to 0.1 Hz for reasons of clarity. The timeaxis of FIG. 7B is a common time axis for both FIGS. 7A and 7B. As shownin FIG. 7A, the voltage across the capacitor decreases during each ofthe current pulses through the discharge circuit, and once the dischargevoltage reaches 120 VDC, the discharge circuit stays on with both thevoltage and current decreasing with time. In other embodiments,depending on the values of timing components, such as capacitors andresistors in the discharge circuit, the pulse frequency may be a fewhundred Hz, or as high as several kHz.

The detailed design of the discharge circuit 300 that operates inaccordance with principles described above will now be described withreference to FIG. 8, which shows a schematic diagram for each of thefunctional blocks 302, 304 and 306 of the discharge circuit 300.Component values for the components shown in FIG. 8 are provided inTable 1.

TABLE 1 Component Values for Discharge Circuit 300 Power Value RatingTolerance Ref. No. (ohms) (watts) (%) Resistors R609 100.0K ¼ W 1 R610100.0K ¼ W 1 R611 100.0K ¼ W 1 R612  220K ¼ W 1 R613  220K ¼ W 5 R614 220K ¼ W 5 R615  3.32K ¼ W 1 R617 100.0K ¼ W 1 R618 100.0K ¼ W 1 R619 220K ¼ W 5 R620  220K ¼ W 5 R621    1K  3 W 5 Value Voltage ToleranceRef. No. (farads) (volts) (%) Capacitors C600 220 PF 500 V 10 C601 2.2NF  50 V 10 C602 2.2 NF  50 V 10 C603 4.7 NF 500 V 10 C633 68 PF 500 V10 Voltage Ref. No. (volts) Diodes D551  15 V D560 300 V Ref. No. TypePart No. Transistors Q540 NPN BTA 42 Q541 NPN SMBT3904 Q542 MOSFETSTN1NB80 Value Ref. No. Type (ohms) Thermistor TH503 PTC 1K

The passive discharge circuit 304 includes a thermistor TH503 and aresistor R621 coupled in series between the DC bus and the input to thecontrolled switch 306. The thermistor TH503 is a positive temperaturecoefficient device whose resistance will increase with an increase intemperature. The use of the thermistor in the passive discharge circuitprovides added safety by increasing resistance through the dischargecircuit when temperature rises, which may indicate a fault in thecircuit. In other embodiments, the passive discharge circuit may includeonly one resistor or some other combination of passive resistancedevices.

The controlled switch 306 includes a transistor Q542 coupled in parallelwith a capacitor C633 between the output of the passive dischargecircuit and the common line. The control circuit 302 includes a numberof devices that operate together to turn on and off the controlledswitch based on the voltage of the DC bus. To simplify the explanationof the operation of the control circuit 302, the control circuit may beconsidered as having a turn-off portion that turns the controlled switchoff and a turn-on portion that turns the controlled switch on, althoughthe two portions of the control circuit do interact in operation toperform the turn-on and turn-off functions. The turn-off portionincludes resistors R609, R610, R611, R615, R617, R618, transistor Q541,capacitors C600, C602, and C603 and diodes D560 and D551. The turn-onportion includes resistors R612, R613, R614, R619, R620, capacitor C601and transistor Q540.

The operation of the discharge circuit 300 will now be described indetail starting from a first state in which the DC bus voltage is at itsfull voltage value, with transistor Q540 just having turned off and withtransistor Q542 just having turned on, allowing current to flow throughthermistor TH503 and resistor R621. At this first state, the voltageacross capacitor C600 is initially zero, but starts increasing ascapacitor C600 charges through resistors R609 and R610. The voltage atthe base of transistor Q541 increases with the voltage across C600, andtransistor Q541 will turn on once this voltage exceeds the transistor'sthreshold voltage. When transistor Q541 turns on, transistor Q542 turnsoff.

The transition from on to off of transistor Q542 generates a currentthrough capacitor C603, which ensures a fast turn-on of transistor Q541,and at the same time results in a minimum off time for transistor Q542.At about the same time, transistor Q540 is turned on as current flowsthrough resistors R613 and R614 and charges capacitor C601. Whentransistor Q540 turns on, capacitor C600 is discharged along withcapacitors C602 and C603. Transistor Q541 will then turn off turning ontransistor Q542, and returning the discharge circuit to the first state.

In the control circuit 302 described above, the timing for controllingthe controlled switch 306 is defined by the voltage on capacitors C600and C603, which are charged from the voltage on the DC bus, so that thetiming of the circuit is dependent on the voltage of the DC bus. In theembodiment shown in FIG. 8, once the voltage of the DC bus reachesapproximately 80 VDC, the voltage at the base of transistor Q541 doesnot reach a level high enough to turn on transistor Q541, andaccordingly, for voltages below 80 VDC, the discharge circuit 300operates as a passive discharge circuit.

Specific values of components and circuit arrangements are provided forthe exemplary embodiment shown in FIG. 8. As understood by those skilledin the art, embodiments of the invention may be implemented using othercircuits with other valued components. In addition, the values ofcomponents provided may be changed to adapt the discharge circuit toaccommodate other DC bus voltages.

In one embodiment of the invention, the discharge circuit 300 remainsactive during operation of the UPS and accordingly does not require aturn-on circuit or device that turns on the discharge circuit when theUPS is powered down. Nonetheless, embodiments of the present inventionmay also be used with turn-on circuits and devices, such that thedischarge circuit is only active once the UPS is powered down todischarge the DC capacitors.

In some instances, regulatory agencies require discharge circuits thathave active components to include redundant circuits, such that thedischarge circuits will still function when one or more activecomponents fail. In one embodiment of the invention, to satisfy thisrequirement, two discharge circuits, like discharge circuit 300 may beused in parallel. Further, as discussed above, some UPSs utilize a dualDC bus configuration having positive and negative DC buses with a sharedcommon bus. For UPSs of this type, large DC capacitors may be used foreach of the DC buses, and a separate discharge circuit 300 may be usedwith each of the buses.

Discharge circuits of embodiments of the invention are described for usewith uninterruptible power supplies, however, as understood by thoseskilled in the art, discharge circuits of the present invention may beused in other types of power supplies and other types of electronicequipment to provide discharge of capacitors or other electricaldevices.

As discussed above, the contactors 134 and 136 of the UPS 100 are usedto provide isolation and backfeed protection. Typical contactors have acoil that receives a control voltage, the application of which pulls thecontactor from an open, OFF state to a closed, ON state. Depending onthe contactor type, the coil may be designed to operate with either ACor DC. AC contactors at times provide a simple solution in that the ACvoltage on the input mains that the contactor is controlling can be usedto power the coil. For devices, like UPSs, that may operate over wideranges of input voltages, the use of the AC input voltage to power thecoil may be undesirable as the coil would be required to operate overthe wide range of input voltages, which may be difficult to implement.

When DC coils are used in contactors of a UPS, DC power is generallyderived from an internal power supply unit, such as power supply 127 ofUPS 100. In such applications, the power supply may be coupled directlyto the mains (rather than through the contactor), and typical powerrequirements allow such a power supply to draw up to 140 watts directlyfrom the AC line. One problem with driving a coil from a DC power supplyis that the coils associated with contactors typically have a very highcoil inrush power required to initially turn the contactor on, while thesteady state power is typically much less. For typical three-phase 120ampere contactors, the inrush power may be as high as 200 watts peakwhen the coil is energized, but drops to approximately 5 watts once thecontactor is in steady state. The high coil inrush power often requiresthe DC power supply to be much larger than necessary for the averagepower consumption of the system or alternatively to require an outputcapacitor in the power supply to be extremely large such as 100,000microfarads.

One embodiment of the present invention, for use with a contactor havinga nominal coil voltage of 24 volts, which will now be described withreference to FIG. 9, allows the use of a DC power supply in the UPS 100to drive the coils of contactors without the need for an oversized powersupply or oversized capacitor in the power supply. FIG. 9 shows afunctional block diagram of a drive circuit 400 coupled to contactor 136of UPS 100. Similar drive circuits may be used to drive contactor 134.For simplicity, in FIG. 9, the connection of contactor 136 to the ACmains is not shown. The drive circuit 400 includes inputs 402 and 404that couple to a DC power supply, which in one embodiment may be powersupply 127. The drive circuit 400 also includes a boost converter 406, acontroller 408, a capacitor 410, a voltage sense circuit 412, a switch414, a switch control circuit 416, and a control input 418.

The operation of the drive circuit 400 is as follows. The boostconverter receives input voltage at inputs 402 and 404 and generates aboosted voltage across capacitor C547. The voltage at capacitor C547 isapplied across contactor 136, when switch 414 is turned on. The state ofswitch 414 is controlled by the switch control circuit 416 which isresponsive to an input control signal 418. Input control signal 418 isgenerated in one embodiment by the UPS controller 116, however, in otherembodiments, the input control signal may be generated by a logiccircuit when, for example, the UPS 100 is switched from a standby modeto a power-on mode. In addition, in one embodiment, control of contactor134 is provided by a separate controller that also controls the bypassswitch 123.

Controller 408 monitors the voltage across capacitor C547 and controlsthe boost converter 406 to provide a predetermined voltage across thecapacitor. The output of the boost converter is controlled to have oneof two different output voltages depending on the state of the contactor136. In one embodiment, the voltage across capacitor C547 is controlledto be approximately 55 volts before the contactor 136 is activated andcontrolled to be approximately 24 volts when the contactor is turned on.In the embodiment of FIG. 9, the switch control circuit provides aninput voltage to the voltage sense circuit 412 when an activation signalis sent to switch 414. The controller 408 detects the additional voltageat voltage sense circuit 412 and thereafter controls the voltage acrossthe capacitor to be 24 volts. The energy released when the voltageacross the capacitor C547 is dropped from 55 volts to 24 volts issufficient to energize the coil of the contactor 136 to pull in thecontactor completely and allow power to flow from the primary mains intothe UPS 100. Once the contactor is closed, the boost converter canprovide sufficient power to the contactor to keep the contactor closed.The contactor can be opened (turned off) by opening the switch 414. Inone embodiment, once the contactor is opened, it cannot be closed againuntil the capacitor C547 is fully charged, which may take up to twoseconds.

A more detailed schematic of the drive circuit 400 in accordance withone embodiment of the invention will now be described with reference toFIG. 10A and FIG. 10B. Table 2 includes a description of components thatmay be used in the circuit diagrams of FIGS. 10A and 10B.

TABLE 2 Component Values For Circuits of FIGS. 10A and 10B Value PowerRating Tolerance Ref. No. (ohms) (watts) (%) Resistors R549  10K ¼ W 5R585  10K ¼ W 5 R586 5.90K  ¼ W 1 R587 200K ¼ W 1 R588  10K ¼ W 5 R5892.7 ohms ¼ W 5 R590  10K ¼ W 5 R591  1K ¼ W 5 R592 100K ¼ W 5 R593 2.7ohms ¼ W 5 R594  10 ohms ¼ W 5 R595 200K ¼ W 1 R596 5.11K  ¼ W 1 R597200K ¼ W 1 R598 100K ¼ W 5 R599  10K ¼ W 5 R600  10K ¼ W 5 R601 100K ¼ W5 R602  10K ¼ W 5 R603  10K ¼ W 5 R604  10K ¼ W 5 R661 200K ¼ W 1 R662200K ¼ W 1 R663 200K ¼ W 1 Value Voltage Tolerance Ref. No. (farads)(volts) (%) Capacitors C540 100 uF 50 V 20 C541 100 nF 50 V 10 C542 1 nF50 V 10 C543 100 pF 50 V 10 C544 1 nF 50 V 10 C545 100 nF 50 V 10 C5474700 uF 63 V 20 C548 47 nF 50 V 10 C549 47 nF 50 V 10 C550 47 nF 50 V 10C551 47 nF 50 V 10 C632 100 nF 50 V 10 Voltage Ref. No. (volts) DiodesD504 75 V D502 75 V D520 100 V  D521 200 V  D522 75 V Inductance CurrentRef. No. (henries) (amperes) Inductor L540 68 uH 1.75 A Ref. No. TypePart No. Transistors Q515 NPN MMBT3904 Q516 NPN MMBT3904 Q520 MOSFETNTB52N10T4 Q521 MOSFET NTB52N10T4 Q525 MOSFET NTB52N10T4 Value Ref. No.Type (ohms) Thermistor TH502 PTC 0.25 ohms Ref. No. Part No. IntegratedIC500 UC3843 Circuit IC501 CD4093

For the components shown in Table 2, transistors Q515 and Q516 areavailable from Fairchild Semiconductor of Wiltshere, UK, transistorsQ520, Q521 and Q525 are available from ON Semiconductor of Phoenix,Ariz., and IC500 and IC501 are available from Texas Instruments ofNiskayuna, N.Y.

As understood by those skilled in the art, embodiments of the inventionare not limited to the particular arrangement of components shown inFIGS. 10A and 10B. FIG. 10A shows the boost converter 406, thecontroller 408, the voltage sense circuit 412, and the capacitor C547 ingreater detail, while FIG. 10B shows the switch 414 and the switchcontrol circuit 416 in greater detail. The boost converter includes atransistor Q525 that is coupled to a diode D520 and an inductor L540. Inaddition, the boost converter includes a resistor R589 that is used tomeasure and control the peak current through Q525 when the boostconverter is operating. This ensures that the peak current build up inL540 during each switching cycle (when Q525 is on) only rises to a levelthat doesn't saturate L540 and is further acceptable for Q525. In FIG.10A, the boost converter block also includes capacitors C545 and C540,which are used as filtering capacitors. A major portion of controller408 is IC500. The controller also includes resistors R588, R590, R591,R592, R593 and R594 and capacitors C541, C542, C543, and C544 which areused to provide operational voltages to IC500 and control theoperational state of IC500.

The voltage sense circuit 412 includes resistors R586, R587, R595, R596,R597 and R663. In the embodiment shown in FIG. 10A, the controller isconfigured to control transistor Q525 of the boost converter to maintaina constant voltage at the junction between resistors R587 and R596.Prior to the activation of the contactor, the switch control circuitprovides a low voltage at point B, and as a result, the controllercontrols the voltage across capacitor C547 to be approximately 55 volts.Once the contactor has been activated, the switch control circuitprovides a voltage of approximately 15 volts causing the controller todetect a higher voltage at the junction of resistors R587 and R596 andreduce the voltage across capacitor C547 to approximately 24 volts.

The circuit of FIG. 10A also includes a thermistor TH502 in series withthe contactor 136 and a diode D521 coupled in parallel with thecontactor. The thermistor has a positive temperature coefficient and isused as a protection device to limit the current to the contactor. DiodeD521 prevents a reverse voltage spike from developing across thecontactor when turned off to protect transistors Q520 and Q521.

As discussed above, FIG. 10B shows the switch 414 and the switch controlcircuit 416 of one embodiment of the drive circuit 400 in greaterdetail. The switch 414 includes two FET transistors Q520 and Q521coupled in series between the contactor and ground. In the embodimentsshown, two transistors are used in the switch circuit, and redundantcircuits are used in the switch control circuit 416 to meet redundancyrequirements of UL. In operation, both transistors Q520 and Q521 areturned on to turn the contactor on and to keep it on.

The switch control circuit 416 receives input signals at 418A and 418Band provides output drive signals for FET transistors Q520 and Q521. Inthe embodiment shown, the switch control circuit is designed to turn ontransistors Q520 and Q521 upon receipt of input pulse signals at inputs418A and 418B. The signals at 418A and 418B may be the same signalgenerated from, for example, a field programmable gate array or from thecontroller 408. The signals at the two inputs may be generated from twodifferent sources for redundancy purposes. In one embodiment, the switchcircuit is designed to operate with a pulse signal having a frequency of20 kHz and a duty cycle of 20%. The switch control circuit 400 includesfour NAND gates IC501A, IC501B, IC501C and IC501D that in one embodimentare implemented on a common integrated circuit, identified as IC501 inTable 2. The switch also includes transistors Q515 and Q516, resistorsR549, R585, R604, R598, R599, R600, R601, R602, R603 and R604,capacitors C548, C549, C550, C551 and C632, and diode pairs D502, D504and D522.

In the switch control circuit, capacitor C632 is coupled across theinput voltage lines 402 and 404 to steady the voltage to the switchcontrol circuit. Capacitors C548, C549 along with resistors R598, R599and R600 are used to bias transistor Q516 to provide a low signal to theinput of gate IC501A when a pulse signal is received at input 418A.Similarly, capacitors C550, C551 along with resistors R601, R602 andR603 are used to bias transistor Q515 to provide a low signal to theinput of gate IC501B when a pulse signal is received at input 418B. Whenthe output of IC501A is high, transistor Q520 is turned on through diodepair D522 and resistor R604. When the output of IC501B is high,transistor Q521 is turned on. Diode D522 and resistor R604 are used toprevent the occurrence of an undesirably high gate voltage fortransistor Q52. The output of IC501A is coupled to the first input ofIC501C through diode pair D504 and resistor R585, and similarly, theoutput of IC501B is coupled to the second input of IC501C through diodepair D502 and resistor R549, such that the output of IC501C goes lowwhen the outputs of both IC501A and IC501B are high. When the output ofIC501C is low, then the output of IC501D is high providing an inputvoltage to the voltage sense circuit.

In the embodiment described above with respect to FIGS. 9, 10A and 10B,the energy released when the output capacitor C547 is discharged from 55volts to 24 volts is sufficient for pulling in the contactor, without alarge inrush current from the power supply feeding the control circuit400. While the contactor remains on, the voltage is controlled at 24volts as described above. If the contactor is turned off, then thevoltage across capacitor C547 will charge back to 55 volts.

According to another aspect of the present invention, the UPS 100 mayinclude a battery monitoring circuit that can monitor the status of oneor a number of battery units that provide DC power to the UPS 100. Thebattery monitoring circuit may be incorporated into battery units thatare internal to the UPS 100, such as battery 118 depicted in FIG. 3, ormay be incorporated into battery units that are connected externally tothe UPS, or both.

In accordance with one embodiment of the present invention, the batterymonitoring circuit may monitor the number of battery units operativelyconnected to the UPS 100, the highest temperature of any of the batteryunits operatively connected to the UPS 100, whether a fuse (or circuitbreaker) is blown (or tripped) in any of the externally (or internally)connected battery units, or each of the above. This information may beprovided to the controller 116 to enable the controller to determine thesize, for example, in Amp-hours, of the bank of battery unitsoperatively connected to the UPS 100. From information concerning thesize of the bank of batteries, the controller 116 may adjust run-timealgorithms used by the UPS during battery mode operation or may adjustthe charge current so as to stay below recommended levels of chargecurrent per battery. The information concerning the highest temperaturemay also be provided to the controller 116 to enable the controller toadjust the charge voltage used to recharge the batteries within thebattery units so as to prolong battery life and avoid thermal run-awayduring charging. These and other aspects of a battery monitoring circuitare now described with respect to FIGS. 11-12.

FIG. 11A illustrates a generalized and simplified schematic diagram of abattery monitoring circuit 600 in accordance with one embodiment of thepresent invention. The battery monitoring circuit 600 may be used tomonitor the temperature of battery units that are operatively connectedto the UPS 100, whether those battery units are disposed within the UPS100 or connected externally thereto. In accordance with one aspect ofthe present invention, the battery monitoring circuit 600 may detect thehighest temperature of any of the battery units that are operativelyconnected to the UPS 100, and communicate that information, via ananalog bus, to the controller 116. Advantageously, the analog bus may beshared by a plurality of individual battery units 601A-601N, some ofwhich may be external to the UPS 100, and others that may be internal tothe UPS 100 (e.g., battery 118 in FIG. 3).

As shown in FIG. 11A, the battery monitoring circuit 600 includes aplurality of individual battery unit monitoring circuits 605A-N, one foreach battery unit 601A-601N that is operatively connected to the UPS100. It should be appreciated that the battery 118 illustrated in FIG. 3may also include one or more battery unit monitoring circuits that aresimilar to the battery monitoring circuit 605, as the present inventionis not limited to the use of battery monitoring circuits on onlyexternal battery units. The output voltage of each of the individualbattery units 601A-601N would typically be connected in parallel withthe output voltage of battery 118. Each battery unit 601 would typicallyinclude a number of interconnected batteries (not shown) within eachbattery unit.

Each battery unit monitoring circuit 605 provides an analog outputsignal that is indicative of the highest temperature within therespective battery unit 601. The analog output signals of each of theplurality of battery units are effectively OR'd together and provided online 665 to a Digital to Analog (D/A) converter 680 that converts theoutput signal that is indicative of the highest temperature of any ofthe battery units 601A-601N to a digital value that may be provided tothe controller 116. That information may then be used by the controller116 for any of a number of purposes, such as for example, to adjust thecharge voltage used to recharge the batteries within the battery unitsso as to prolong battery life and/or avoid thermal run-away duringcharging, to sound an alarm, to visually display that information to anoperator, etc.

It should be appreciated that the output signal provided on line 665need not be an analog signal, as it could alternatively be a digitalsignal. However, the use of an analog signal, rather than a digitalsignal, reduces the cost and number of components needed to provide suchinformation to the controller. Indeed, the relatively low componentcount and cost, and the use of standard components with relatively lowfailure rates and very low power consumption permits battery unitmonitoring circuits to be provided with each battery unit with littleimpact on cost or failure rate of the UPS system. Moreover, because onlya single signal line is used, cabling is simplified, and shielded cablesneed not be used to avoid interference with, or interference from othercircuits present in the UPS.

As depicted in FIG. 11A, each battery unit monitoring circuit 605includes a first resistor R610, a second resistor R620, a thermistor NTC630, a buffer B650, and a diode D660. The first resistor R610 and thethermistor NTC 630 are connected in series between a supply voltage anda reference terminal, and the second resistor R620 is connected inparallel with the thermistor NTC 630. The thermistor NTC 630 is aNegative Temperature Coefficient (NTC) device having a resistance thatdecreases in response to an increase in temperature, and would typicallybe physically disposed in close proximity to the individual batterieswithin each respective battery unit. It should be appreciated that aplurality of thermistors may alternatively be provided, for example,with each connected in parallel and physically disposed proximate to anindividual battery within the respective battery unit 601, as thepresent invention is not limited to only a single thermistor.

In operation, resistor R610, thermistor NTC 630, and resistor R620operate as a voltage divider, the output of which is the commonconnection of R610, NTC 630, and R620. The output of the voltage divideris indicative of the temperature sensed by the thermistor NTC 630. Asthe temperature of a battery unit rises, the resistance of thermistorNTC 630 decreases, thereby decreasing the combined resistance of NTC 630and R620, and increasing the voltage dropped across R610.

The output of the voltage divider formed by the common connection ofR610, NTC 630 and R620 is connected to the input of a buffer B650 orunity gain amplifier, with the output of the buffer B650 being providedto the cathode of the diode D660. The anode of the diode D660 providesan analog signal on line 665 that may be combined with the signals fromother battery units to identify the highest temperature of any of thebattery units 601A-601N that are operatively connected thereto. Inoperation, diode D660 acts as a selection switch selecting the batteryunit with the highest temperature (which in the embodiment depicted inFIG. 11A, will provide the lowest voltage).

The output of the diode D660 from each of the battery unit monitoringcircuits 605A-N is then provided to an amplifier A670, the input ofwhich is connected, via a pull-up resistor R640 to a supply voltage.Advantageously, the supply voltage to which the pull-up resistor R640 isconnected may be the same as the supply voltage to which R610 isconnected, permitting the analog bus that connects each of the pluralityof battery unit monitoring circuits to include only three conductors; acommon signal line 665, a supply voltage line, and a common ground.Amplifier A670 buffers and reduces the amplitude of the signal receivedon line 665 and provides a buffered and reduced signal on a data line690. That buffered signal is then provided to an A/D converter 680 thatconverts the signal received on data line 690 to a digital value andprovides the output digital value to the controller 116. The digitalvalue output by the A/D converter is indicative of the highesttemperature of any of the individual battery units 601 that areoperatively connected to the UPS 100. As discussed further below,pull-up resistor R640, amplifier A670, and A/D converter 680 may beshared amongst the plurality of battery unit monitoring circuits 605A-Nto further reduce the number of individual electrical components used toimplement the battery monitoring circuit 600.

In the embodiment illustrated in FIG. 11A, the A/D converter 680 is a 12bit A/D converter that provides a bit value in a Q-11 format that mayrange in value between 0 and 1400. However, it should be appreciatedthat other types of A/D converters, data formats, and ranges may beused, as the present invention is not limited to a particular type ofA/D converter, a particular format, or a particular range in values. Inaccordance with one embodiment of the present invention, the digitalvalue output by the A/D converter 680 may be converted to a temperatureby the following equation:

T [C]=−3.6737E−08*x ³+1.0773E−04*x ²−1.5229E−01*x+96.471;

where “x” is the bit value provided by the A/D converter 680. In oneembodiment, the bit value may be converted to a temperature inaccordance with the above equation by a Digital Signal Processor (DSP)in the controller 116. It should be appreciated that the presentinvention is not limited to the use of a DSP to convert bit values to atemperature, as a number of alternative methods may be used. Forexample, rather than utilizing a DSP, a look-up table that may beaccessed by the controller 116 may be provided that correlates bitvalues with temperature. FIG. 11B graphically illustrates how the bitvalue provided by the A/D converter may correspond to the temperaturewithin a battery unit.

In accordance with one embodiment, the pull-up resistor R640, amplifierA670, and A/D converter 680 may be physically disposed within the UPS100, rather than within an individual battery unit, although the presentinvention is not so limited. For example, these components may bephysically disposed on a circuit board within the controller 116, suchthat battery units may be easily added or removed from the system bysimply daisy chaining the conductors carrying the supply voltage, thecommon ground, and the signal line 665. Such a configuration minimizesthe cost of each of the individual battery unit monitoring circuits byutilizing only a single D/A converter, rather than replicating thisfunction within each individual battery unit monitoring circuit.Moreover, physically disposing the A/D converter outside the batteryunit monitoring circuit avoids any noise issues that may be associatedwith transmitting digital signals.

In accordance with another embodiment of the present invention, ratherthan using buffer B650 or a unity gain amplifier in the manner depictedin FIG. 11A, a high gain amplifier may be used instead. This alternativeembodiment still permits the analog output signals of each of theplurality of battery units to be effectively OR'd together, but reducesthe impact of the diode drop across D660A-N and makes the batterymonitoring circuit 600 less sensitive to component variations and/ortemperature dependent behavior differences that may be anticipated tooccur during production. This embodiment is now described with respectto FIG. 11C.

As depicted in FIG. 11C, the output of the voltage divider formed by thecommon connection of R610, NTC 630, and R620 may be provided to thenon-inverting (i.e., positive or +input) of a high gain amplifier, withthe output of the high gain amplifier being provided to the cathode ofthe diode D660. The anode of the diode D660 is connected to theinverting input (i.e., the negative or − input) of the respective highgain amplifier and also connected to the anodes of the diodes from theother battery unit monitoring circuits 605B-N. In this manner, eachbattery unit monitoring circuit 605 includes the diode D660 within anegative feedback unity gain buffering circuit, and thus the voltagedrop across the diode becomes less important to the accuracy of thecircuit. This can be significant, as the diode drop across the differentdiodes D660A-N may suffer from large component variations and may behighly temperature dependent. It should be appreciated that othernegative feedback topologies may alternatively be used to implement theoperation of the buffer B650 and render the circuit less sensitive tocomponent variations, as the present invention is not limited to thespecific configuration shown in FIG. 11C.

In accordance with another embodiment of the present invention, abattery monitoring circuit 700 is provided that is capable of monitoringthe number of battery units operatively connected to the UPS 100. Fromthis information, which may be provided to the controller 116, thecontroller may determine the size, for example, in Amp-hours, of thebank of battery units operatively connected to the UPS 100, and mayadjust any run-time algorithms used by the UPS during battery modeoperation. The battery monitoring circuit of this embodiment may alsodetect whether a fuse (or circuit breaker) is blown (or tripped) in anyof the externally (or internally) connected battery units.Advantageously, the battery monitoring circuit of this embodiment may becombined with the battery monitoring circuit described above withrespect to FIGS. 11A-11C with little additional cabling, and fewadditional components. In this regard, only a single additional signalline may be added, and only a single passive resistor need be added.

As illustrated in FIG. 12, a single resistor R710 is pulled to groundfor each set of two battery units 701 installed in a battery frame 705.It should be appreciated that battery 118 of FIG. 3 may be implementedusing a number of battery units or modules installed internally in theUPS 100 or externally with all of the battery units operativelyconnected in parallel, and the battery frame 705 may be an internalbattery frame or an external battery frame. Further, each battery unitmay include a number of individual batteries coupled in series or inparallel, depending on the requirements of the equipment with which theUPS is used.

The single resistor R710 may be pulled to ground through a switch 720,which may be a mechanical switch or an electronic switch 720, such as aMOS transistor. This switch 720 may be activated manually orelectronically through the installation procedure of the battery units.In one embodiment, described in detail below, where the batterymonitoring circuit 600 of FIGS. 11A-C is combined with the batterymonitoring circuit 700 of FIG. 12, the resistor R710 may be pulled toground through an electronic switch, such as a MOSFET, that is activatedby a voltage comparator that compares the voltage across NTC 630 toidentify when a battery unit is connected, without any manualintervention. Alternatively, the switch 720 may be a fuse that isinstalled for each pair of battery units, one end of which is connectedto a common ground.

As depicted in FIG. 12, one terminal of the resistor R710 is connectedto the switch or fuse 720, and the other terminal of the resistor R710is connected to a common signal line 760 that is shared amongst each ofthe plurality of external (and/or internal) battery units 701 and/orbattery frames 705. As additional battery units are connected to thecommon signal line 760, the effective resistance of the parallelcombination of resistors R710 decreases, resulting in an increase in thevoltage provided to the common signal line 760. This voltage level maybe sensed to determine the number of battery units that are operativelyconnected to the UPS 100.

Each battery frame 705 may include a switch 750 that is connectedbetween the common signal line 760 and the common ground. The switch 750may be associated with a fuse or a circuit breaker (not shown), such aswhere the switch is activated (closed) in the event that the fuse isblown or the circuit breaker is tripped. As known to those skilled inthe art, many larger fuses and/or circuit breakers are equipped with anassociated switch that is activated by a small pin or other mechanismthat pops out when the fuse is blown or the circuit breaker is tripped.The common signal line 760 is pulled hard to the common ground in theevent that the fuse or circuit breaker associated with switch 750 isblown or tripped. Such a switch may also be provided in any of thebattery units to detect a fault condition. It should be appreciated thatin the event that the switch 750 is activated in one of the external orinternal battery frames, the common signal line 760 will be pulled toground, and it may not be possible to detect the number of functionalbattery units operatively connected to the UPS 100. For this reason, thecontroller 116 may use conservative values for determining the run-timeduring battery back-up mode and the level of maximum charging currentused to charge the batteries.

The common signal line 760 from each of the pairs of battery units 701is tied to a supply voltage through a pull-up resistor R740 and to thecommon ground through a pull-down resistor R730 and provided to theinput of an amplifier A770. The amplifier A770 buffers and reduces theamplitude of the signal received on the common signal line 760 andprovides the buffered and reduced signal on a data line 790 to the inputof a A/D converter 780. The A/D converter converts the signal receivedon data line 790 to a digital value and provides the output digitalvalue to the controller 116. The digital value output by the A/Dconverter is indicative of the number of pairs of battery units that areoperatively connected to the UPS 100.

In the embodiment illustrated in FIG. 12, the A/D converter 780 is a 12bit A/D converter that provides a bit value in a Q-11 format that mayrange in value between 0 and approximately 1200. As will be discussedfurther below, the bit value provided by the output of the A/D converter780 is inversely proportional to the number of battery units operativelyconnected to the UPS 100. It should be appreciated that other types ofA/D converters, data formats, and ranges may be used, as the presentinvention is not limited to a particular type of A/D converter, aparticular format, or a particular range in values. In accordance withone embodiment of the present invention, and where each of the pairs ofbattery units has approximately the same size, in terms of Amp-hours,the total size of the bank of batteries operatively connected to the UPS100 may be determined in accordance with the following equation:

Battery Size [Ah]=(27584−15.6*x)/x;

where “x” is the bit value provided by the A/D converter 780, and eachbattery unit has a nominal size of approximately 7.2 Ah. Bit valueslower than approximately 50 would indicate that a fuse or circuitbreaker associated with switch 750 is blown in one of the batterymodules.

In one embodiment, the bit value provided by the A/D converter 780 maybe converted to a size, in Amp-hours in accordance with the aboveequation by a Digital Signal Processor (DSP) or other processor in thecontroller 116. It should be appreciated that the present invention isnot limited to the use of a DSP to convert bit values to a size of thebattery bank, as a number of alternative methods may be used. Forexample, rather than utilizing a DSP, a look-up table that may beaccessed by the controller 116 may be provided that correlates bitvalues with the size of the battery bank.

As noted above, in one embodiment of the present invention, each pair ofbattery units 701 is a fixed size, in terms of Amp-hours, such the sizeof the bank of batteries operatively connected to the UPS 100 may bereadily determined. However, it should be appreciated that the presentinvention is not limited to battery units or battery modules having afixed size, as battery units of variable size may also be accommodated.For example, battery units having different sizes could each be providedwith a resistor R710 whose resistance value varies dependent upon thesize, for example, in terms of Amp-hours, of the battery unit with whichit is associated. As an example, the resistance value of the resistorR710 could be inversely proportional to size rating of the associatedbattery unit.

In accordance with one embodiment of the present invention, resistorsR730, R740, amplifier A770 and A/D converter 780 may be physicallydisposed within the UPS 100, for example, within the controller 116.This permits the cost of that portion of the monitoring circuit providedwith the battery units to be minimal, such that battery units may beeasily added or removed.

Advantageously, the battery monitoring circuit 700 may be used togetherwith the battery monitoring circuit 600 described above with respect toFIGS. 11A-11B. In this regard, both battery monitoring circuits mayshare the same supply voltage and common ground connections, such thatan analog bus comprising only four conductors (e.g., signal line 690,signal line 790, and common supply voltage and ground lines) may beused. In one embodiment, where the battery monitoring circuit 600 ofFIGS. 11A-C is combined with the battery monitoring circuit 700 of FIG.12, the resistor R710 may be pulled to ground through an electronicswitch 720, such as a MOSFET, that is activated by a voltage comparator.The voltage comparator may compare the voltage across one or eachthermistor NTC 630 of each pair of battery units with the output of afixed voltage divider (e.g., connected to the supply voltage) todistinguish when a battery unit is connected, without requiring anyfurther electrical or mechanical devices or signal lines, and withoutthe need for any manual intervention.

According to another aspect of the present invention, the UPS 100 mayinclude a revision control circuit that is capable of detecting therevision level of individual printed circuit boards within the UPSsystem and communicating that information to the controller 116. Asknown to those skilled in the art, during the life of a product,especially a complex product, such as a UPS system, various revisions inhardware or in firmware may be made to one or more of the differentcircuit boards or modules that are combined to form the product. Forexample, in a UPS system, a hardware or even firmware change in one ofthe printed circuit boards or modules may change the scale factorprovided by a current sensor, or may affect values for switchingfrequency, dead-time, etc. used by the power factor correction (PFC)circuit, the inverter(s), or the battery charger. In general, it isdesired that new releases of firmware or software used by the controller116 be capable of safely and/or efficiently operating with olderrevisions of the various printed circuit boards or modules that togetherform the UPS system.

Frequently, in conventional UPS systems, the ability to detect therevision status of the various printed circuit boards or modules may bedependent upon an operator being able to physically detect the revisionstatus of each of the various printed circuit boards or modules, andcommunicate that information to someone with the ability to modify theoperation of the controller to accommodate the varying revision levels.Frequently, this may be difficult where the various modules are hiddenfrom view, is prone to human error, and may require the manualre-programming of certain parameters.

However, according to an embodiment of the present invention, aninexpensive and automated manner of detecting the revision status ofvarious modules is provided. This aspect of the present invention is nowdescribed with respect to FIG. 13.

As shown in FIG. 13, the UPS 100 may include a revision control circuit800 that is capable of identifying the revision status of a plurality ofdistinct modules or printed circuit boards 801A-F and 815A-B thattogether may form at least a portion of a UPS system. In accordance withone embodiment of the present invention, the revision control circuit800 may utilize an analog bus that may include only a single signal line870 that is distributed amongst the various modules or circuit boards.This single signal line 870 may be daisy chained amongst the variousmodules or circuit board and provided to the controller 116 in the formof a digital signal that can then be used to modify, if necessary, theoperation and parameter values used by the controller to control theoperation of the UPS 100.

The simplified schematic representation of the revision control circuitillustrated in FIG. 13 is representative of a larger system in whichthere are a number of distinct printed circuit boards or modules. Forexample, in FIG. 13, each of the printed circuit boards 815A and 815Bidentified as Power Interface Boards might contain modules associatedwith the battery charger circuit 125 and input/output filters for therectifier/PFC circuit 114 and the inverter circuit 120, while each ofthe printed circuit boards 801A-801C and 801D-801F identified as PowerBoards may contain modules associated with each phase of the PFC circuitin a three phase UPS system and/or the inverter circuit 120. It shouldbe appreciated that in smaller systems, a fewer number of distinctprinted circuit boards or modules would need to be accommodated.

As shown in FIG. 13, each printed circuit board or module 801 includes athermal switch 810 and a coded resistor 812 that are connected inparallel between a signal line 813 and a common ground. The thermalswitch 810 would be expected to be open during normal operatingconductions, but becomes a short circuit in the event that a hightemperature condition exists on the associated printed circuit board ormodule 801.

In the embodiment depicted in FIG. 13, each coded resistor 812 may haveone of two resistance values indicative of the revision level of thatboard or module. It should be appreciated that more than two differentresistance values may be provided, as the present invention is notlimited to only two values. However, it should be appreciated that onlya limited number of different resistor values would be needed to reflectrelatively significant revisions, as minor revisions that do not requireany significant changes in the operation of the controller need not bedistinguished. In the illustrated embodiment, each of the printedcircuit boards or modules 801A-801C would be expected to have the samerevision level, although in a larger UPS system, the revision level ofmodules 801A-C could differ from those of 801D-F.

Under normal operating conditions (e.g., when a high temperaturecondition does not exist and thermal switch 810 is closed), each of theprinted circuit boards or modules 801 provides one of two resistancevalues on line 813 that are connected in common. The parallelcombination of their resistance will therefore assume one of tworesistance values. The combined resistance present on line 813 from eachof the printed circuit boards or modules 801 is connected in series witha coded resistor 817 present on printed circuit board or module 815. Inthe illustrated embodiment, each coded resistor 817 may have one of tworesistance values indicative of the revision level of that board ormodule. It should again be appreciated that more than two resistancevalues may be provided, as the present invention is not limited to aparticular number of resistance values.

The parallel combination of the resistors 817A and 817B each in serieswith the parallel combination of resistors 812A-C and 812D-F providesone of seven different resistance values (or ranges of resistancevalues) that can be used to detect the revision status of each of theprinted circuit boards or modules 801A-F and 815A-B, as illustrated inTables 3 and 4 and discussed further below. The combined resistancevalue on signal line 870 is provided to an amplifier 840, the input ofwhich is connected to a current source 820 and a resistor 830. Amplifier840 buffers and reduces the amplitude of the signal received on signalline 870 and provides the buffered and reduced signal to the input of anA/D converter 850 on line 860.

In the embodiment illustrated in FIG. 13, the A/D converter 850 is a 12bit A/D converter that provides a bit value in a Q-11 format that mayrange in value between −2048 and approximately 2048. As indicated withrespect to tables 3 and 4 below, the bit value provided by the output ofthe A/D converter 850 is indicative of the revision status of theprinted circuit boards or modules 801A-F and 815A-B. In the tablesbelow, Table 3 represents the revision status level of printed circuitboards 801A-F and 815A-B based upon the measured bit value provided byA/D converter 850 for a smaller (10/15 kVA 208V and 15/20 kVA 400V) UPSsystem, and Table 4 represents the revision status level of printedcircuit boards 801A-F and 815A-B based upon the measured bit valueprovided by A/D converter 850 for a larger (20/30 kVA 208V and 30/40 kVA400V) UPS system.

TABLE 3 Power Board Power Interface Measured bit value revision # Boardrevision # −2048 to 465  High heat sink temperature, board revisionsn.a.  466 to 1099 1 1 1100 to 1293 1 2 1294 to 1512 1 3 1513 to 1729 2 11730 to 1917 2 2 1918 to 2048 2 3

TABLE 4 Power Board Power Interface Measured bit value revision # Boardrevision # −2048 to 465  High heat sink temperature, board revisionsn.a. 466 to 557 1 1 558 to 657 1 2 658 to 770 1 3 771 to 883 2 1 884 to981 2 2  982 to 2048 2 3

It should be appreciated that other types of A/D converters, dataformats, and ranges may be used, as the present invention is not limitedto a particular type of A/D converter, a particular format, or aparticular range in values. In accordance with one embodiment of thepresent invention, the bit value provided by the A/D converter 850 isread by a processor in the controller 116 and compared to a look-uptable stored in a memory of the controller 116. The controller 116 maythen determine the appropriate parameters and/or control routines touse. Typically the bit value provided by the A/D converter 850 would beread during an initialization routine by the controller 116, or when aprinted circuit board or module is hot-swapped in the power-on state,although the present invention is not so limited.

Although the embodiment of FIG. 13 has been described with respect toseven different resistance values or ranges of resistance values (e.g.,six different values or ranges of value corresponding to differentrevision levels of the printed circuit boards or modules 801A-F and815A-B, and one value or range of value corresponding to a hightemperature or open circuit condition), it should be appreciated thatmore than seven different revision status levels may be detected. Forexample, additional resistance values may be provided for the resistors812 and 817, and the ranges of bit values narrowed to accommodate same.

Having thus described at least one illustrative embodiment of theinvention, various alterations, modifications and improvements willreadily occur to those skilled in the art. Such alterations,modifications and improvements are intended to be within the scope andspirit of the invention. Accordingly, the foregoing description is byway of example only and is not intended as limiting. The invention'slimit is defined only in the following claims and the equivalentsthereto.

1. An uninterruptible power supply for providing power to a load, theuninterruptible power supply comprising: a first input to receive inputpower from an input power source; an output to provide output power; abypass input to receive bypass power from a bypass power source, whereinthe bypass input is selectively coupled to the output to provide outputpower from the bypass power source; an input power circuit coupled tothe first input and having a DC output that provides DC power having afirst DC voltage level; a back-up power source coupled to the inputpower circuit to provide DC power at the DC output in a back-up mode ofoperation; an inverter circuit having an input coupled to the DC outputof the input power circuit and an output coupled to the output of theuninterruptible power supply to provide the output power derived from atleast one of the input power source and the back-up power source;wherein the uninterruptible power supply is constructed and arranged ina bypass mode of operation to control the inverter circuit to convert ACpower from the bypass power source at the output of the inverter circuitto DC power at the input of the inverter circuit; and a power supplycoupled to the input of the inverter circuit to receive operating DCpower from the inverter and constructed and arranged to provide DC powerto components of the uninterruptible power supply in the bypass mode ofoperation.
 2. The uninterruptible power supply of claim 1, furthercomprising a battery charger coupled to the input of the invertercircuit to receive DC power and provide power to charge the back-uppower source in the bypass mode of operation.
 3. (canceled)
 4. Theuninterruptible power supply of claim 1, wherein the back-up powersource includes at least one battery.
 5. The uninterruptible powersupply of claim 4, wherein the first input and the bypass input areconfigured to be coupled to a common source of power.
 6. Theuninterruptible power supply of claim 5, further comprising a bypassswitch coupled between the bypass input and the output of the invertercircuit and controlled to operate in a closed position in the bypassmode of operation. 7.-10. (canceled)
 11. An uninterruptible power supplyfor providing power to a load, the uninterruptible power supplycomprising: a first input to receive input power; an output to provideoutput power; a bypass input to receive bypass power, wherein the bypassinput is selectively coupled to the output to provide output power fromthe bypass power; an input power circuit coupled to the first input andhaving a DC output that provides DC power having a first DC voltagelevel; a back-up power source coupled to the input power circuit toprovide DC power at the DC output in a back-up mode of operation; aninverter circuit having an input coupled to the DC output of the inputpower circuit and an output coupled to the output of the uninterruptiblepower supply to provide the output power derived from at least one ofthe input power and power from the back-up power source; means forcontrolling the inverter circuit in a bypass mode of operation toconvert AC power from the bypass power source at the output of theinverter circuit to DC power at the input of the inverter circuit; and apower supply coupled to the input of the inverter circuit to receive DCpower and to provide DC power to components of the uninterruptible powersupply in the bypass mode of operation.
 12. The uninterruptible powersupply of claim 11, further comprising means for charging the back-uppower source in the bypass mode of operation.
 13. (canceled)
 14. Theuninterruptible power supply of claim 11, wherein the back-up powersource includes at least one battery.
 15. The uninterruptible powersupply of claim 14, further comprising a bypass switch coupled betweenthe bypass input and the output of the inverter circuit and controlledto operate in a closed position in the bypass mode of operation.
 16. Theuninterruptible power supply of claim 15, wherein the means forcontrolling the inverter circuit include means for controlling powerfactor at the output of the inverter circuit in bypass mode ofoperation. 17.-20. (canceled)
 21. A method for providing uninterruptedpower from a power supply having a first input, a bypass input and anoutput from which power is provided, the power supply further includinga source of back-up power and an inverter that converts DC power to ACpower for use at the output of the power supply, the method comprising:operating the power supply in a first mode of operation with power atthe output being supplied from the inverter and derived from power atthe first input; operating in a bypass mode with power at the outputbeing supplied from power at the bypass input; and in the bypass mode,operating the inverter to provide DC power at an input of the inverterfrom AC power at an output of the inverter; wherein the power supplyfurther includes a power supply unit coupled to the input of theinverter, and wherein the method further comprises powering the powersupply unit from the DC power at the input of the inverter in bypassmode.
 22. The method of claim 21, wherein the back-up power source iscoupled to the input of the inverter, and wherein the method furthercomprises charging the back-up power source in the bypass mode.
 23. Themethod of claim 22, wherein the back-up power source includes a battery,and wherein charging the back-up power source includes using DC power atthe input of the inverter to charge the battery.
 24. The method of claim23, further comprising operating in a back-up mode of operation withpower at the output being derived from power from the back-up powersource.
 25. (canceled)
 26. The method of claim 24, further comprisingcontrolling current through the inverter in the bypass mode to besubstantially in phase with voltage at the output of the inverter. 27.The method of claim 26, further comprising sensing a voltage at theinput of the inverter in bypass mode and controlling the inverter tomaintain the voltage at the input of the inverter at a predeterminedvalue. 28.-32. (canceled)